How It Works

Binary has two digits, 0 and 1. Balanced ternary has three: −1, 0 and +1. Each position is worth three times the one to its right — 1, 3, 9, 27 — and each position can add its weight, subtract it, or sit out.

That third option is the whole difference. Binary can only ever add, so it climbs towards a number from below. Balanced ternary can overshoot and come back. The figure shows decimal 5 built both ways: binary walks 4 then 1; balanced ternary leaps to 9 and returns, 9 − 3 − 1.

Three bits cover 0 to 7 — eight values, all of them positive. Three trits cover −13 to +13 — twenty-seven values, with the negatives included for free. Each trit carries log₂(3) ≈ 1.585 bits of information against a bit's 1.

Negation is free

Because the digits are symmetric about zero, negating a number is flipping the sign of every trit. No two's complement, no separate sign bit, and no asymmetric range where the most negative value has no positive twin. Subtraction is addition of the negation, and the negation costs nothing to form.

Balanced ternary itself is public mathematics — Knuth wrote about it, and the Setun computer ran on it in 1958. What is patented is the device and the stack built on it, below. Try it yourself in the balanced ternary calculator.

• Outer multi-wall nanotube (MWCNT) — absorbs the gate photon and shields the channel
• Inner metallic single-wall nanotube (SWCNT) — a ballistic one-dimensional transmission line
• AC terminal and its pulse polarity
• Signal current, forward — trit +1
• Signal current, reversed — trit −1
• No current — trit 0, the true zero

A trit needs three physically distinct states, and this is where most three-valued logic proposals come apart. On silicon you have to manufacture a third voltage level and then defend it against noise for the life of the chip. The THATTE device does not build a third level. It uses a direction.

The device is two concentric carbon nanotubes: a metallic single-wall nanotube (SWCNT) running inside a multi-wall nanotube (MWCNT), separated by a van der Waals gap. The inner tube is a metallic ballistic conductor — a one-dimensional transmission line, not a semiconducting channel with a gate. Two independent things act on it:

• A gate photon, absorbed by the outer MWCNT, decides whether the device conducts at all. The mechanism is specification-level detail, shared under mutual NDA.
• The AC terminal's pulse polarity decides which way the resulting current runs.

Photon during the positive half-cycle gives trit +1. Photon during the negative half-cycle gives trit −1. No photon gives trit 0.

Why the zero is the interesting one

Trit 0 is not a mid-point that has to be held. It is the absence of drive — no gate bias, no maintained level, nothing to drift. And because the two conducting states are the same current in opposite directions, they are symmetric by construction rather than by trimming: NEGF quantum transport simulation of the ternary inverter cell returns a current symmetry |I(−1) / I(+1)| of 1.0000.

The AC waveform also means the signal always passes through zero on its way between the two polarities — there is never a direct jump from +1 to −1. That is the subject of Why AC, Not DC.

Full detail on Thatte1 — the device patent, and the contactless all-photonic variant on Thatte8.

This is where the physics and the arithmetic meet. A trit here is a signed current, and currents that meet at a junction add — that is Kirchhoff's current law, not a circuit anyone had to design. So in the THATTE gate library balanced ternary addition is performed by the circuit topology itself: wire two trits into a node and the node carries their sum.

The sum of two trits can be −2, −1, 0, +1 or +2, and only three of those are themselves trits. A threshold stage resolves the node current into a sum trit and a carry trit. The carry is always itself a trit — −1, 0 or +1, never anything wider — so the carry path out of one digit position is the same kind of wire as the digits going in.

The same trick, further up the stack

Over the finite field GF(3), multiplying by 1 is a wire passing through and multiplying by 2 — negation, in balanced ternary — is a wire crossing. Neither needs an active device. Thatte11 builds ternary Hamming encode and decode, plus Reed–Solomon and LDPC constructions, on that observation: the finite-field multipliers that dominate the area and power cost of binary error correction are, here, interconnect.

The same absence shows up in the neural accelerator. A ternary weight of +1 passes the trit through, −1 crosses the wires, and 0 withholds the optical pulse and leaves the device dark — so a zero weight costs no switching energy at all, whether or not any software schedules around it. Thatte10 is that patent.

The table is balanced ternary arithmetic, which is public mathematics; the calculator demo propagates it step by step. What Thatte2 claims is the KCL arithmetic engine that performs it as circuit topology, and the optical-ternary standard cells it is built from — TINV, TMIN2, TMAX3 and TMAJ3.

• Current carrying a +1 trit
• Current carrying a −1 trit
• Node current on its way to the threshold stage

A device is not a computer. The reason this project is unusual is not the nanotube; it is that every layer above the nanotube was designed for it, from first principles, and filed as one portfolio — twelve complete specifications with the Indian Patent Office in 2026, six in April and six in August.

Six of them are the vertical stack. Each layer is built out of the one below it: the gate library out of the device, the processor out of the gates, memory and security out of the processor's fabric, and the compiler and microkernel out of the instruction set. A seventh, Thatte12, is the same two-nanotube device again — cooled far enough that its inner tube's degenerate conducting channels give a qutrit, a native three-level quantum unit. One fabrication process, classical and quantum.

The remaining five are not layers. They are capabilities built on top of particular layers: how the devices are integrated in three dimensions, a variant with no electrical contacts at all, how a ternary processor talks to a binary bus, what it accelerates, and how it stays correct.

That is what the figure is for. Read it bottom to top and the answer to “what would you actually do with this?” is the whole column, not one cell in it.

Dimensions, thresholds, wavelengths, code-point assignments and simulation figures for all twelve are shared under mutual NDA. See the full portfolio →