Binary-Ternary Interface Circuit
Bidirectional translation between balanced ternary trit streams and existing binary bus infrastructure — the migration path for ternary hardware.
Overview
A bidirectional interface between balanced ternary trit streams {+1, 0, −1} produced by the photonic-ternary device and conventional binary bus infrastructure. This is the patent that makes the rest of the stack adoptable: ternary compute can be placed inside existing binary systems without replacing them.
Two encodings are disclosed. A compact fixed-width encoding maps each trit to two bits, leaving one bit pattern unused — that spare pattern is repurposed as a hardware error flag, giving self-checking error detection at no latency cost.
A denser native encoding utilizes the fact that five trits have 35 = 243 states, which fits inside a single 256-state binary byte. The 13 surplus byte values are repurposed as a complete built-in framing and control protocol — frame delimiters, escape, acknowledgement, and flow control — so framing costs no additional bandwidth. Exact code-point assignments and packing figures are shared under mutual NDA.
Key Innovations
- Bidirectional trit-stream to binary-bus translation in both directions
- Spare code point in the fixed-width encoding used as a hardware error flag
- Zero-latency self-checking error detection — detection is structural, not computed
- Native encoding packing five trits into one binary byte
- Surplus byte states repurposed as a complete framing and control protocol
- Practical migration path — ternary compute inside binary infrastructure
Why It Matters
Every new computing substrate faces the same adoption problem: it must coexist with what already exists. A ternary processor that cannot talk to a binary bus is a laboratory curiosity regardless of how good its physics is.
The encodings are chosen so that the arithmetic works out in favour of ternary: the mismatch between powers of three and powers of two leaves spare states, and those spare states are exactly what a protocol needs.
Disclosure
This page describes the architecture and purpose of the invention. Specific parameters — dimensions, thresholds, wavelengths, code assignments, and simulation figures — together with the complete claim set are shared under mutual NDA. Contact manish@manitlab.org to request access.
Related Patents
Interested in licensing this technology?
Thatte9 is available for licensing to research institutions and industry partners.
Licensing InformationFull Technical Brief Available Under NDA
Simulation data, quantum transport results, fabrication specifications, and complete patent claims are shared under mutual NDA only.
Follow maniTLab
New research, patent updates and essays, as a feed your reader collects for you. No list to join, no address to hand over, nothing to unsubscribe from.
RSS Feed →Write to Manish
Research collaboration, licensing enquiries, technical questions, or press requests.