T3ISA Playground

A pedagogical runner for a public-level subset of T3ISA. Registers hold small integers as balanced ternary; negation is a trit flip; comparison returns a trit, not a flag. Share a program with the permalink button. This is not a cycle-accurate PANINI model and does not implement patent claim encodings.

Program

Instruction subset

  • LI Rd, imm — load decimal immediate (−9841…9841)
  • TADD Rd, Rs1, Rs2 · TSUB · TMUL
  • TINV Rd, Rs1 — free negation (flip every trit)
  • TMIN · TMAX — trit-wise min/max
  • TCMP Rd, Rs1, Rs2 — Rd ← sign(Rs1−Rs2) as −1 / 0 / +1
  • TBRANCH Rs, N|Z|P, label — three-way branch
  • label: · THALT · # comments

Registers R0–R8

PC 0 State ready Cycles 0
Scope
Public teaching surface only — mnemonics and behaviour match the T3ISA Explorer descriptions, not private opcode maps or claim-level PANINI timing. For the device and ISA patents see Thatte3 and open source. Related: balanced ternary calculator.